1. Field of the Invention
The present invention is directed toward the field of manufacturing integrated circuits.
2. Description of the Related Art
Presently, aluminum is widely employed in integrated circuits as an interconnect, such as plugs and wires. However, higher device densities, faster operating frequencies, and larger die sizes have created a need for a metal with lower resistivity than aluminum to be used in interconnect structures. The lower resistivity of copper makes it an attractive candidate for replacing aluminum.
One challenge in employing copper instead of aluminum is the fact that copper dry etching is not presently feasible. A polishing process, such as chemical mechanical polishing, is used to remove undesirable portions of a deposited layer of copper. The need to use chemical mechanical polishing presents a challenge, because copper has poor adhesion to materials that are presently being used as diffusion barriers beneath the copper. The polishing of copper that is deposited over a diffusion barrier can therefore result in portions of the copper being undesirably peeled away from the surface of the diffusion barrier. This can render an integrated circuit defective.
When depositing copper, it is desirable to employ chemical vapor deposition ("CVD"), as opposed physical vapor deposition, because CVD provides for a more conformal layer of copper. However, the chemical vapor deposition of copper presents a further challenge. The challenge arises from a byproduct that is produced during the deposition of the copper.
In one instance, the chemical vapor deposition of copper is achieved by using a precursor known as Cupraselect, which has the formula Cu(hfac)L. The L represents a Lewis base compound, such as vinyltrimethylsilane ("VTMS"). The (hfac) represents hexafluoroacetylacetonato, and Cu represents copper. During the CVD of copper using the Cu(hfac)L precursor, the precursor is vaporized and flowed into a deposition chamber containing a wafer. In the chamber, the precursor is infused with thermal energy at the wafer's surface, and the following reaction results: EQU 2 Cu(hfac)L.fwdarw.Cu+Cu(hfac).sub.2 +2L (Eqn. 1)
The resulting copper (Cu) deposits on the upper surface of the wafer, along with the Cu(hfac).sub.2 byproduct. The gaseous Lewis base byproduct (2L) is purged from the chamber. The presence of the byproduct as well as other contaminants on the wafer's surface reduces the adhesion of the copper to an underlying diffusion barrier, such as tantalum nitride.
In order to improve the adhesion of copper to an underlying diffusion barrier, the process for depositing copper has been divided into two steps. During a first step, physical vapor deposition (PVD) is performed to deposit a seed layer of copper. In PVD, a copper target is placed above a substrate onto which the copper is to be deposited. An argon gas is introduced into the environment between the copper target and the substrate. The argon gas is then excited through the use of a radio frequency ("RF") signal to create a plasma containing ions.
The ions from the plasma strike the copper target, thereby dislodging particles of the copper which deposit on the substrate. These copper particles are generally ionized and thus are highly energetic. Such energetic copper ions adhere well to the barrier layers. The substrate is biased so that a voltage gradient forms between the target and the substrate, thereby causing the copper ions to accelerate along the gradient and bombard the substrate. As a result of the bombardment, the copper particles strongly adhere to the surface of the substrate. Secondly, this PVD process provides a clean interface between the copper seed layer and the barrier layer.
Once the seed layer of copper is deposited using PVD, a bulk layer of copper is deposited. The bulk layer is deposited by either standard chemical vapor deposition or electrical plating. The bulk layer of copper adheres relatively well to the copper seed layer.
However, the use of the PVD process results in poor step coverage, which is unacceptable for devices that have small features. Further, the PVD process cannot be accomplished in the same chamber as either chemical vapor deposition or electrical plating. The need to have both a PVD chamber and either a CVD or electrical plating chamber increases integrated circuit manufacturing costs.
Accordingly, it is desirable to provide for the conformal chemical vapor deposition of copper onto a diffusion barrier, so that the adhesion between the copper and underlying diffusion barrier is improved. It is also desirable for such a deposition to be performed in a single chamber (in situ). It is further desirable to decrease the production of contaminant byproducts during the deposition of copper, so that the deposition can be performed faster and with a smaller amount of precursor.